ACM SIGCOMM 2023 Call for Tutorials and Hackathons:
https://conferences.sigcomm.org/sigcomm/2023/cf-tutorials.html
* Call for Tutorials and Hackathons *
We are excited to announce that proposals for Tutorials and Hackathons for SIGCOMM 2023 can now be submitted at https://conferences.sigcomm.org/sigcomm/2023/cf-tutorials.html
We seek to extend the SIGCOMM experience by tutorials on selected topics given by renowned scientists and practitioners in their fields. We therefore solicit proposals for full-day or half-day tutorials on topics relevant to the SIGCOMM community. We also solicit proposals to organize hackathons co-located with SIGCOMM.
Tutorials must cover advanced topics that fit the scope of SIGCOMM and are of current interest to the SIGCOMM community. Tutorials may be lectures, interactive workshops, hands-on training, or any combination of the above. Successful tutorials educate the community members on emerging methods, concepts, and tools to expand the research capabilities of the community. Cross-disciplinary topics are also welcome. Exploring diverse ways of organizing the content, delivering the tutorial, and interacting with the audience are especially encouraged.
A hackathon is an intense goal-oriented team-work activity organized in a sprint-like one-day event, where members from various backgrounds and expertise come together to work towards the stated goals of the hackathon. We encourage applications from all fields that fit the interest of the SIGCOMM community.
The current plan is that SIGCOMM 2023 will be an in-person conference. Still, we ask the authors to have a "plan B" for an online tutorial/hackathon, in case there are unexpected travel restrictions due to COVID-19 at the time of the event.
Tutorial and hackathon proposals should be submitted in PDF format, should not exceed three (3) pages in total, and be sent to the Tutorial/Hackathon Chairs via the submit button on the above web site.
The deadline for submission is April 21, 2023. The notification of acceptance will be sent out on May 12, 2023.
You can find more information about submission guidelines:
https://conferences.sigcomm.org/sigcomm/2023/cf-tutorials.html
For any questions or clarifications, please contact the Tutorial/Hackathon Chairs, via the button at the above web site.
Aaron<https://sk-alg.tbm.tudelft.nl/aaron/> and Kostis<https://web.stanford.edu/~kkaffes/> – Publicity Chairs of SIGCOMM’23
Are you interested in Internet measurements and research and have a project or tool in mind that contributes to upholding an open, globally-connected, secure, and trustworthy Internet?
The Internet Society has launched the Pulse Research Fellowship<https://pulse.internetsociety.org/fellowship> to support one researcher to work on data-driven analysis or develop tools that add value to understanding one or more of the Internet Society Pulse focus areas: Enabling Technologies<https://pulse.internetsociety.org/technologies>, Internet Shutdowns<https://pulse.internetsociety.org/shutdowns>, Internet Resilience<https://pulse.internetsociety.org/resilience>, and Market Concentration<https://pulse.internetsociety.org/concentration>, and Keeping Traffic Local<https://www.internetsociety.org/blog/2022/08/african-peering-key-to-keeping…>.
Apply now!<https://app.smartsheet.com/b/form/af855f33bfdc4129872ca57fc284bff1>
The Pulse Research Fellowship is open to researchers based anywhere in the world who want to research a specific area that helps in upholding an open, globally-connected, secure, and trustworthy Internet using state-of-the-art and/or novel Internet measurement techniques.
The duration of the fellowship is six months (mid-May to mid-November) and the selected candidate can work remotely. Applicants will be selected according to their:
* Proposal’s relevance to the Internet Society Pulse focus areas.
* Knowledge of the field of Internet measurements and experience necessary to accomplish the proposed research goals.
* Ability to commit at least 25 hours per week to the fellowship.
The selected applicant will receive a generous stipend based on experience and time commitment.
See the fellowship webpage<https://pulse.internetsociety.org/fellowship> for more information, including how to apply. If you have questions about this program or the application process, please email pulsefellowship(a)isoc.org<mailto:foundation@isocfoundation.org>.
INTERNATIONAL SYMPOSIUM ON LOW POWER ELECTRONICS AND DESIGN (ISLPED) 2023
--- ISLPED 2023 CALL FOR PAPERS ---
http://www.islped.org <http://www.islped.org/>, Twitter: @islped
Conference date: August 7–8, 2023
Location: TU Wien, Vienna, Austria
IMPORTANT DATES
Abstract registration: March 6 March 13 (extended), 2023, at 11:59pm PST
Full paper: March 13 March 20 (extended), 2023, at 11:59pm PST
Invited Talk, Panel, and Embedded Tutorial Proposals: April 10, 2023
Notification of Paper Acceptance: May 22, 2023
Submission of Camera-Ready Papers: June 19, 2023
The International Symposium on Low Power Electronics and Design (ISLPED) is the premier forum for presentation of innovative research in all aspects of low power electronics and design, ranging from process technologies and analog/digital circuits, simulation and synthesis tools, AI/ML-enhanced EDA/CAD, system-level design, and optimization, to system software and applications. Specific topics include, but are not limited to, the following three main tracks and sub-areas:
1. Technology, Circuits, and Architecture
1.1. Technologies
Low-power technologies for device, interconnect, logic, memory, 2.5/3D, cooling, harvesting, sensors, optical, printable, biomedical, battery, and alternative energy storage devices and technology enablers for
non-Boolean and quantum/quantum-inspired compute models.
1.2. Circuits
Low-power circuits for logic, memory, reliability, yield, clocking, resiliency, near-/sub-threshold, and assist schemes; Low-power analog/mixed-signal circuits for wireless, RF, MEMS, AD/DA Converters, I/O, PLLs/DLLS, imaging and DC-DC converters; Energy-efficient circuits for emerging applications (e.g., biomedical, in-vitro sensing, autonomous), circuits using emerging technologies; Cryogenic circuits. Design technology co-optimization (DTCO) for low power.
1.3. Logic and Architecture
Low-power logic and microarchitecture for SoC designs, processor cores (compute, graphics, and other special purpose cores), cache, memory, arithmetic/signal processing, cryptography, variability, asynchronous design, and non-conventional computing. System technology co-optimization (STCO) for low power.
2. EDA, Systems, and Software
2.1. CAD Tools and Methodologies
CAD tools, methodologies, and AI/ML-based approaches for low-power and thermal-aware design. AI/ML for acceleration of circuit simulation and IP block design convergence. Power estimation, optimization, reliability, and variation impact on power optimization at all levels of design abstraction: physical, circuit, gate, register transfer, behavior, and algorithm.
2.2. Systems and Platforms
Low-power, power-aware, and thermal-aware system design including data centers, SoCs, embedded systems, Internet-of-Things (IoT), wearable computing, body-area networks, wireless sensor networks, and system-level power implications due to reliability and variability. Applications of AI/ML-based solutions and brain-inspired computing to power-aware system and platform design.
2.3. Software and Applications
Energy-efficient, energy/thermal-aware software and application design, including scheduling and management, power optimization through HW/SW codesign, and emerging low-power AI/ML applications.
3. Crosscutting Topics
3.1. AI/ML Hardware
Low-power AI/ML HW techniques including approximations, application driven optimizations, in-memory/energy-efficient accelerations, and neuromorphic computing; Energy-efficient AI/ML HW using emerging technologies (including quantum computing).
3.2. Hardware and System Security
Low-power hardware security primitives (PUF, TRNG, cryptographic/post-quantum cryptographic accelerators), nano-electronics security, supply chain security, IoT security and AI/ML security; Energy-efficient approaches to system security.
4. Industrial Design Track
ISLPED’23 solicits papers for an “Industrial Design” track to reinforce interaction between the academic research community and industry. Industrial Design track papers have the same submission deadline as regular papers and should focus on similar topics but are expected to provide a complementary perspective to academic research by focusing on challenges, solutions, and lessons learnt while implementing industrial-scale designs.
Submissions (not published/accepted/under review by another journal, conference, symposium, or workshop) should be full-length papers of up to 6 pages (PDF format, double-column, US letter size, using the IEEE Conference format, available at (https://www.ieee.org/conferences/publishing/templates.html <https://www.ieee.org/conferences/publishing/templates.html>) including all illustrations, tables, references, and an abstract of no more than 250 words. Submissions must be anonymous. Submissions failing above requirements will be automatically rejected. Accepted papers will be submitted to the IEEE Xplore Digital Library and the ACM Digital Library. ISLPED’23 will present three Best Paper Awards based on the ratings of reviewers and a panel of judges.
ISLPED also features a Low Power Design Contest with live demonstrations and awards. Submissions are due on May 15, 2023. More details will soon be available on the conference web page.
There will be several invited talks by industry and academic thought leaders on key issues in low power electronics and design. The Symposium may also include embedded tutorials to provide attendees with the necessary background to follow recent research results, as well as panel discussions on future directions in low power electronics and design. Proposals for invited talks, embedded tutorials, and panels should be sent by email to the ISLPED’23 Technical Program Co-Chairs, Umit Ogras (uogras(a)wisc.edu <mailto:uogras@wisc.edu>) and Pascal Meinerzhagen (pascal.a.meinerzhagen(a)intel.com <mailto:pascal.a.meinerzhagen@intel.com>) by the deadline listed above.
Participants interested in exhibiting at the Symposium should contact the General Co-Chairs by May 1, 2023.
Hi All,
Registration for PAM 2023 is now open and notably free of charge: https://pam2023.networks.imdea.org/registration/
The conference will be held virtually on 21-23 March. This year's program features a range of measurement topics, including applications, performance, network infrastructure and topology, measurement tools, and security and privacy. This year will also include two exciting keynote presentations from Roya Ensafi (University of Michigan) and Andra Lutu (Telefonica Research).
The full program and schedule is available here: https://pam2023.networks.imdea.org/program/
We hope you'll join us!
-PAM 2023 Organizers
Dear colleagues,
hope you're all doing well.
The application round for SEE 11 has been closed and the final selection
of successful candidates has been made. Congratulations for those
selected and say thank you to all that sent their proposals in.
If your application was locally relevant but hasn't been selected, don't
give up just yet - we have more events lined up!
------------------------------------------------------
NEW MEETING ADDED TO THE RACI APPLICATION CALENDAR
------------------------------------------------------
It is my pleasure to announce that RIPE NCC will be organising another
event in the SEE region. The meeting will be held in Sofia, Bulgaria on
June 27-28. It will be an opportunity for the technical community in
Bulgaria and broader SEE community to come together and share knowledge
and experiences, and to identify areas for regional cooperation. The
event is open to all and there is no cost to attend.
RIPE NCC will be supporting the academic participation through RACI
programme once again. The RACI call for application is already open,
please apply before April 23:
https://www.ripe.net/participate/ripe/raci/raci
For people that have already applied for SEE11 and/or RIPE 86, please
submit your application details again and only tick the "RIPE NCC Days
Sofia" box when doing so.
MEETING: RIPE NCC Days Sofia
DATE: 27-28 June 2023
RACI APPLICATION FORM:
https://www.ripe.net/participate/forms/apply/raci-application-form-2023/
RACI DEADLINE: 23 April 2023
-----------------------------------------------------------------------
RIPE 86 REGISTRATION OPEN & RACI RIPE 86 APPLICATION ROUND CLOSES SOON
-----------------------------------------------------------------------
Registration for the RIPE meeting is officially open :
https://ripe86.ripe.net/attend/register/
If you work in academia and have an interesting research you want to
present to the RIPE community, you still have a week to apply for the
RACI programme - applications will be closed on March 9 at 23:59 UTC+1.
MEETING: RIPE 86, Rotterdam
DATE: 22-26 May 2023
RACI APPLICATION FORM:
https://www.ripe.net/participate/forms/apply/raci-application-form-2023/
RACI DEADLINE: 9 March 2023
If you are member of RIPE community interested in attending RIPE meeting
but do not have a research ready for a presentation, you can apply to
join us as a fellow via RIPE Fellowship programme. The Programme
provides basic assistance for successful candidates to participate in a
RIPE Meeting.
It is open to all in the RIPE NCC service region and might be especially
interesting for students.
As mentioned, the selected candidates will get a chance to join us for
the meeting but unlike RACI, they do not have the opportunity to present
their work to the community and that is what distinguishes these two
initiatives. The RIPE Fellowship is still a great way to get involved
with the RIPE Community. If you know anyone that might be interested,
please let them know about this opportunity.
The application deadline is the same as for RACI: March 9 at 23:59
UTC+1.
More information on Fellowship programme and how to apply here:
https://www.ripe.net/participate/ripe/ripe-fellowship
If you have any questions about RACI or Fellowship, please feel free to
contact me.
Kind regards,
Jelena
